SystemVerilog中除了數(shù)組、隊(duì)列和關(guān)聯(lián)數(shù)組等數(shù)據(jù)結(jié)構(gòu),這些數(shù)據(jù)結(jié)構(gòu)還可以嵌套。
module top; typedef int Qint[$]; // dynamic array of queues Qint DynamicQ[ ]; // same as int DynamicQ[ ][$]; // queue of queues Qint QueueQ[$]; // same as int QueueQ[$][$]; // associative array of queues Qint AssociativeQ[string]; // same as //int AssociativeQ[string][$]; initial begin // Dynamic array of 2 queues DynamicQ = new[2]; //Create dynamic array of size 2 (queues) // initialize queue 0 with three entries DynamicQ[0] = {1,2,3}; // Push onto queue 1 DynamicQ[1].push_back(1); $display("DynamicQ = %p", DynamicQ); //push/initialize queue of 3 queues QueueQ[0].push_front(7); QueueQ[1].push_back(6); QueueQ[2].push_back(1); $display("QueueQ = %p", QueueQ); // Associative array of queues AssociativeQ["one"].push_back(5); AssociativeQ["two"] = {5,6,7,8}; $display("AssociativeQ = %p", AssociativeQ); end endmodule : top
仿真log:
DynamicQ = '{'{1, 2, 3} , '{1} } QueueQ = '{'{7} , '{6} , '{1} } AssociativeQ = '{"one":'{5} , "two":'{5, 6, 7, 8} }
在上面的例子中,我們定義了三種不同類型的數(shù)據(jù)結(jié)構(gòu)。隊(duì)列動態(tài)數(shù)組、隊(duì)列隊(duì)列和隊(duì)列關(guān)聯(lián)數(shù)組:
// dynamic array of queues Qint DynamicQ[ ]; // same as int DynamicQ[ ][$]; // queue of queues Qint QueueQ[$]; // same as int QueueQ[$][$]; // associative array of queues Qint AssociativeQ[string]; // same as //int AssociativeQ[string][$];
初始化這個隊(duì)列動態(tài)數(shù)組大小為2,然后分別初始化這兩個數(shù)組:
DynamicQ = new[2]; //Dynamic Array size of 2. DynamicQ[0] = {1,2,3}; DynamicQ[1].push_back(1);
初始化隊(duì)列隊(duì)列
QueueQ[0].push_front(7); QueueQ[1].push_back(6); QueueQ[2].push_back(1);
初始化隊(duì)列關(guān)聯(lián)數(shù)組
//Queue at associative index/key "one" AssociativeQ["one"].push_front(5); //Queue at associative index/key "two" AssociativeQ["two"] = {5,6,7,8};
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原文標(biāo)題:SystemVerilog中的隊(duì)列數(shù)組、隊(duì)列隊(duì)列和隊(duì)列關(guān)聯(lián)數(shù)組
文章出處:【微信號:芯片驗(yàn)證工程師,微信公眾號:芯片驗(yàn)證工程師】歡迎添加關(guān)注!文章轉(zhuǎn)載請注明出處。
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