| Resolution (Bits) | 12 |
| Number of DAC channels (#) | 8 |
| Interface type | Parallel |
| Output type | Buffered Voltage |
| Settling time (μs) | 15 |
| Features | On-chip Offset and Gain Calibration, Reset to Mid-Scale |
| Reference type | Ext |
| Architecture | String |
| Rating | Catalog |
| Output range (Max) (mA/V) | 33 |
| Output range (Min) (mA/V) | -16.5 |
| Operating temperature range (C) | -40 to 105 |
- Bipolar Output: ±3V, up to ±16.5V
- Unipolar Output: 0V to +33V
- 12-Bit Resolution
- Low Power: 13.5mW/Ch
- Relative Accuracy: 1LSB Max
- Flexible User Calibration
- Low Zero/Gain Error: ±1 LSB Max
- Low Glitch: 4nV-s
- Settling Time: 15μs
- Channel Monitor Output
- Programmable Gain: x4, x6
- Programmable Offset
- 12-Bit Parallel Interface: 50MHz (Write Operation)
- Packages: QFN-56 (8mm x 8mm), TQFP-64 (10mm x 10mm)
- APPLICATIONS
- Automatic Test Equipment
- PLC and Industrial Process Control
- Communications
The DAC7728 is a low-power, octal, 12-bit digital-to-analog converter (DAC). With a 5V reference, the output can either be a bipolar ±15V voltage when operating from a dual ±15.5V (or higher) power supply, or a unipolar 0V to +30V voltage when operating from a +30.5V power supply. With a 5.5V reference, the output can either be ±16.5V for a dual ±17V (or higher) power supply, or a unipolar 0V to +33V voltage when operating from a +33.5V (or higher) power supply. This DAC provides low-power operation, good linearity, and low glitch over the specified temperature range of –40°C to +105°C. This device is trimmed in manufacturing and has very low zero and full-scale error. In addition, user calibration can be performed over the entire signal chain. The output range can be offset by using the DAC Offset Register.
The DAC7728 features a standard, high-speed, 12-bit parallel interface that operates at up to 50MHz and is 1.8V, 3V, and 5V logic compatible, to communicate with a DSP or microprocessor. The eight DACs and the auxiliary registers are addressed with five address lines. The device features double-buffered interface logic. An asynchronous load input (LDAC) transfers data from the DAC data register to the DAC latch. The asynchronous CLR input sets the output of all eight DACs to AGND. The VMON pin is a monitor output that connects to the individual analog outputs, the offset DAC, and the reference buffer outputs through a multiplexer (mux).
The DAC7728 is pin-to-pin compatible with the DAC8728 (16-bit) and the DAC8228 (14-bit).
