為提高芯片驗證與測試的可靠性，針對片上網絡核心芯片的結構特點，設計出一種基于宿主機/目標機通信模式的測試系統。重點描述了測試系統軟硬件的設計與實現，并采用Stratix系列FPGA芯片進行原型測試和驗證。實驗結果表明，該系統可對芯片的復位、實現功能及穩定性進行全面測試，而且原理簡單、操作方便、運行穩定，極大地提高了芯片測試的可靠性和速度。

Abstract:

?In order to enhance the reliability of chip’s verification and testing， the article designs a test system of communication model based on host and target machine， for the structural characteristics of the network-on-chip. It focuses on designing and implementation of system’s hardware and software， and uses FPGA chip of Stratix series to test and verify. The experiment results show that this system has simple principle， convenient operation， and stable operation. It can achieve a comprehensive test of chip’s reset， functions and stability， which improves the reliability and speed of chip testing.