多核處理器是處理器領(lǐng)域發(fā)展的必然趨勢。多核之間的通信可以利用基于總線的共享cache實現(xiàn)，也可以通過片上互連技術(shù)實現(xiàn)。在采用共享總線的多核體系結(jié)構(gòu)中，如何解決多個處理器核對總線控制權(quán)的競爭，以及對爭用延時進(jìn)行定量分析，是處理器體系結(jié)構(gòu)優(yōu)化的主要依據(jù)。為給體系結(jié)構(gòu)優(yōu)化提供量化依據(jù)，采用排隊論方法建立總線爭用延時量化分析模型，分析影響總線爭用延時的各種相關(guān)因素。
關(guān)鍵詞：多核處理器；排隊論；量化分析；總線爭用
Analysis of Delay-time of Bus Contention on Multi-core Processor Based on Queuing Theory

【Abstract】Multi-core is the trend in the field of processor. Communication in the multi-cores is realized either by the cache-share (cache memory),which is based on the bus system, or by the interlink technology-on-chip. In the architecture of multi-core processor which is based on bus-share,how to solve the bus contention between the multi-cores, and quantificationally analyze the delay time is the main gist of architecture optimization.By introducing queuing theory, this paper quantificationally analyzes delay of bus contention, gainsthe factors which infect the delay of buscontention, and provides quantitative gist for architecture optimization.
【Key words】multi-core processor; queuing theory; quantificational analysis; bus contention