在线观看www成人影院-在线观看www日本免费网站-在线观看www视频-在线观看操-欧美18在线-欧美1级

電子發燒友App

硬聲App

0
  • 聊天消息
  • 系統消息
  • 評論與回復
登錄后你可以
  • 下載海量資料
  • 學習在線課程
  • 觀看技術視頻
  • 寫文章/發帖/加入社區
會員中心
創作中心

完善資料讓更多小伙伴認識你,還能領取20積分哦,立即完善>

3天內不再提示
電子發燒友網>電子資料下載>類型>參考設計>AD9434本地FMC卡和ML605 Xilinx參考設計

AD9434本地FMC卡和ML605 Xilinx參考設計

2021-04-23 | pdf | 94.67KB | 次下載 | 3積分

資料介紹

This version (09 Jan 2021 00:45) was approved by Robin Getz.The Previously approved version (19 Mar 2018 17:29) is available.Diff

AD9434 Native FMC Card

Introduction

The AD9434 is a 12-bit monolithic sampling analog-to-digital converter (ADC) optimized for high performance, low power, and ease of use. The part operates at up to a 500 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a sample-and-hold and voltage reference, are included on the chip to provide a complete signal conversion solution. This reference design includes a data capture interface and the external DDR-DRAM interface for sample storage. It allows programming the device and monitoring it's internal status registers. The board also provides other options to drive the clock and analog inputs of the ADC.

Supported Devices

Functional Description

The reference design is built on a Zynq based system parameterized for linux. It consists of three functional modules, a LVDS interface, a PN monitor and a DMA interface. The LVDS interface captures and buffers data from the ADC. The data is captured using ISERDES primitives and is captured 4 samples wide at 1/4th of the ADC clock (125MHz at 500MHz ADC clock). The DMA interface then transfers the samples to the external DDR-DRAM. The capture is initiated by the software. The status of capture (overflow, over the range) are reported back to the software. By default, the board is configured to use the onboard clock.

Supported Carriers

Downloads

Help & Support

13 Feb 2015 18:57 · rejeesh kutty

ML605 Xilinx Reference Design (Obsolete)

Quick Start Guide

The reference design has been tested with ML605. It should be easily portable to other boards such as KC705 and VC707, only the ISERDES primitive, UCF and MHS files need to be changed. The bit file provided combines the FPGA bit file and the SDK elf files. It may be used for a quick check on the system. All you need is the hardware and a PC running a UART terminal and the programmer (IMPACT). This bit file configuration also captures the test mode outputs of ADC.

Required Hardware

  • ML605 board
  • AD9434-FMC board (the default setup uses onboard clock)
  • Signal generator (for data)

Required Software

  • Xilinx ISE (Programmer (IMPACT) is sufficient for the demo and is available on Webpack). Use the latest version or the one used in the reference design.
  • A UART terminal (Tera Term/Hyperterminal), Baud rate 57600.
  • Xilinx Chipscope Analyzer (for signal capture plot).

Running Demo (SDK) Program

To begin, connect the AD9434-FMC board to the FMC-LPC connector of ML605 board (see image below). Connect power and two USB cables from the PC to the JTAG and UART USB connectors on the edge of the ML605. The demo program uses the default board configuration that uses an on-board clock. Connect a signal source to the AIN SMA (J100) connector of the FMC card. After the hardware setup, turn the power on to the ML605.

Hardware setup

Start IMPACT, and initialize the JTAG chain. The program should recognize the Virtex 6 device. Start a UART terminal (set to 57600 baud rate) and then program the device. If programming was successful, you should be seeing messages appear on the terminal as shown in the figure below. After reading some default registers in the AD9434 and AD9517, the program enables different test patterns available on the ADC.

Terminal

After patterns and prbs sequences are verified, if no errors are present, you may use the chipscope busplot to see the captured signal (see below). The ADC data is available 4-samples wide at 125MHz. The most recent sample is at the most significant bits of the captured data.

Chipscope Busplot

Using the Reference Design

Functional Description

The reference design is built on a microblaze based system parameterized for linux. It consists of three functional modules, a LVDS interface, a PN monitor and a DMA interface. The LVDS interface captures and buffers data from the ADC. The data is captured using ISERDES primitives and is captured 4 samples wide at 1/4th of the ADC clock (125MHz at 500MHz ADC clock). The DMA interface then transfers the samples to the external DDR-DRAM. The capture is initiated by the software. The status of capture (overflow, over the range) are reported back to the software.

Registers

Refer to the regmap.txt file inside the pcores directory.

Clock Selection

The board provides different (some modification maybe necessary) possible clock path for clocking the AD9434.

Downloads

FPGA Referece Designs:

Only Xilinx coregen xco files are provided with the reference design. You must regenerate the IP core files using this file. See generating Xilinx netlist/verilog files from xco files for details.

Tar File Contents

The tar file contains, in most cases, the following files and/or directories. To rebuild the reference design simply double click the XMP file and run the tool. To build SDK, select a workspace and use the C file to build the elf file. Please refer to Xilinx EDK documentation for details.

license.txt ADI license & copyright information.
system.mhs MHS file.
system.xmp XMP file (use this file to build the reference design).
data/ UCF file and/or DDR MIG project files.
docs/ Documentation files (Please note that this wiki page is the documentation for the reference design).
sw/ Software (Xilinx SDK) & bit file(s).
../cf_lib/edk/pcores/* The pcores directory.
下載該資料的人也在下載 下載該資料的人還在閱讀
更多 >

評論

查看更多

下載排行

本周

  1. 1AN-1267: 使用ADSP-CM408F ADC控制器的電機控制反饋采樣時序
  2. 1.41MB   |  3次下載  |  免費
  3. 2AN158 GD32VW553 Wi-Fi開發指南
  4. 1.51MB   |  2次下載  |  免費
  5. 3AN148 GD32VW553射頻硬件開發指南
  6. 2.07MB   |  1次下載  |  免費
  7. 4AN-1154: 采用恒定負滲漏電流優化ADF4157和ADF4158 PLL的相位噪聲和雜散性能
  8. 199.28KB   |  次下載  |  免費
  9. 5AN-960: RS-485/RS-422電路實施指南
  10. 380.8KB   |  次下載  |  免費
  11. 6EE-249:使用VisualDSP在ADSP-218x DSP上實現軟件疊加
  12. 60.02KB   |  次下載  |  免費
  13. 7AN-1111: 使用ADuCM360/ADuCM361時的降低功耗選項
  14. 306.09KB   |  次下載  |  免費
  15. 8AN-904: ADuC7028評估板參考指南
  16. 815.82KB   |  次下載  |  免費

本月

  1. 1ADI高性能電源管理解決方案
  2. 2.43 MB   |  450次下載  |  免費
  3. 2免費開源CC3D飛控資料(電路圖&PCB源文件、BOM、
  4. 5.67 MB   |  138次下載  |  1 積分
  5. 3基于STM32單片機智能手環心率計步器體溫顯示設計
  6. 0.10 MB   |  130次下載  |  免費
  7. 4使用單片機實現七人表決器的程序和仿真資料免費下載
  8. 2.96 MB   |  44次下載  |  免費
  9. 5美的電磁爐維修手冊大全
  10. 1.56 MB   |  24次下載  |  5 積分
  11. 6如何正確測試電源的紋波
  12. 0.36 MB   |  18次下載  |  免費
  13. 7感應筆電路圖
  14. 0.06 MB   |  10次下載  |  免費
  15. 8萬用表UT58A原理圖
  16. 0.09 MB   |  9次下載  |  5 積分

總榜

  1. 1matlab軟件下載入口
  2. 未知  |  935121次下載  |  10 積分
  3. 2開源硬件-PMP21529.1-4 開關降壓/升壓雙向直流/直流轉換器 PCB layout 設計
  4. 1.48MB  |  420062次下載  |  10 積分
  5. 3Altium DXP2002下載入口
  6. 未知  |  233088次下載  |  10 積分
  7. 4電路仿真軟件multisim 10.0免費下載
  8. 340992  |  191367次下載  |  10 積分
  9. 5十天學會AVR單片機與C語言視頻教程 下載
  10. 158M  |  183335次下載  |  10 積分
  11. 6labview8.5下載
  12. 未知  |  81581次下載  |  10 積分
  13. 7Keil工具MDK-Arm免費下載
  14. 0.02 MB  |  73810次下載  |  10 積分
  15. 8LabVIEW 8.6下載
  16. 未知  |  65988次下載  |  10 積分
主站蜘蛛池模板: 欧美综合精品一区二区三区 | 成人免费看黄页网址大全 | 激情综合网婷婷 | 黄色免费毛片 | 在线免费观看一区二区三区 | 日本加勒比黑人 | 在线免费黄色 | 国产精品www视频免费看 | 天天舔天天干 | 国产亚洲新品一区二区 | 午夜视频在线观看国产 | 天天射美女 | 国产三级视频 | 中文4480yy私人免费影院 | 免费理论片在线观看播放 | 91黄色视屏 | 日本网站免费 | 99久久精品免费看国产 | 又色又爽视频 | 在线观看免费黄视频 | 亚洲精品亚洲人成人网 | 一级毛片西西人体44rt高清 | 五月激情综合 | 三级黄色免费 | 高清色本在线www | 日本5级床片全免费 | 四虎影院黄色 | 国产亚洲精品久久久久久久软件 | 欧美xxxxbbbb| 国产午夜精品视频 | 18男女很黄的视频 | se01亚洲 | 美女黄色在线 | 一个色综合网站 | 天堂视频网 | 亚洲精品私拍国产福利在线 | 中文字幕卡二和卡三的视频 | 国产三级中文字幕 | 日本久久高清视频 | 天天弄天天干 | 国内精品免费视频自在线 |