This application note describes a reframe controller for the
Cypress CY7B933 HOTLink? Receiver. The primary function
of the controller is to monitor the Receive Violation Symbol
output, RVS, from the CY7B933 in order to detect framing
errors and, under the correct conditions, assert the Reframe
signal, RF, to the CY7B933. The controller function is designed
with a state machine, a few counters, and some decode
logic. All are implemented in VHDL and fit into a Cypress
CY37032 32-macrocell CPLD. The exact implementation in
this application note makes several assumptions about the
next-higher-level controller that may not be universally applicable.
However, the source code for the design is provided in
Appendix A at the end of this application note so that modification
and customization for other interfaces is easily
possible.